收藏本站
Chapter 2: Hardware Overview
R
Analog and digital power supplies are isolated using ferrites and proper grounding
layout.
Signal Bus Multiplexing
Because of the large number of signals required by each of the video interfaces and the
limited number of signals on the FMC connector, it is not possible to dedicate a connector
pin for each of the data bits. To fit within the connector signal count, some signals must be
shared. Rather than using traditional bus multiplexor ICs, which add cost, board space,
and latency to the signals, some of the signals can be multiplexed by sharing nets and
controlling the signal output enables. This was done with two pairs of data buses.
DVI Bus Multiplexing
The DVIIN_x signals are shared between the DVI analog interface and the DVI digital
receiver. The DVI receiver outputs are high-impedance when the PDO_L pin is asserted
Low. This pin is controlled by the DVIIN_OE signal on the I 2 C I/O expander. The default
of this is Low, not enabled. The outputs of the DVI analog interface, the AD9884A, can be
disabled through its I 2 C control registers. Its default state is output enabled. To prevent bus
contention, only one of these interfaces can be enabled at a time.
Note: The data width from the analog interface is 10 bits, while the data width from the digital
receiver is only 8 bits. This means that two of the bits are not shared. These signals were connected
such that the two devices use the same bit as the most significant bit, bit 9. The digital receiver does
not use bits 1 and 0.
Video Input Multiplexing
The VIDIN_x signals are shared between the video decoder and camera 1. The camera 1
signals are set to high impedance using the REN pin on the deserializer, driven by the net
CAM1_OE, from the I 2 C I/O expander. The default state is Low, not enabled. The outputs
of the video decoder, the ADV7180, are disabled through its I 2 C control registers. The
default state is enabled. To prevent bus contention only one of these interfaces can be
enabled at a time.
FMC Low Pin Count Connector
Standard Pinout
The VITA-57 FMC connector is of the low-pin-count (LPC) variant. All I/O on this
connector shall be 3.3V single ended, with the exception of two LVDS clocks. The available
pins in the LPC connector are in rows C, D, G, and H, as shown in Figure 2-6 .
22
www.xilinx.com
FMC-Video Daughter Board
UG458 (v1.1) February 8, 2008
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
HW-FMC-XM104-G FMC XM104 CONNECTIVITY CARD
HW-PC4-MS CABLE MOUSE SPLITTER FOR HW-PC4
HW-S3PCIE-DK-PROMO1 KIT STARTER SPARTAN3 PCI EXPRESS
HW-SPAR3-SK-UNI-G KIT STARTER SPARTAN-3
HW-SPAR3E-DISP-DK-UNI-G KIT DEV SPARTAN3E DISPLAY
HW-SPAR3E-SK-UK-G KIT STARTER SPARTAN-3E
HW-USB-II-G PLATFORM CABLE USB II
HW-USBN-2A ACCY USB DOWNLOAD CABLE STD SPD
相关代理商/技术参数
HW-FMC-XM101-G 功能描述:HARDWARE FMC INTERFACE CARD RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF)
HW-FMC-XM104-G 功能描述:FMC XM104 CONNECTIVITY CARD RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF)
HW-FMC-XM105-G 功能描述:FMC XM105 CONNECTIVITY CARD RoHS:是 类别:编程器，开发系统 >> 配件 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF)
HW-FPGABOARD 制造商:Xilinx 功能描述:FPGA DEMONSTRATION BOARD
HWFR-B310 制造商:LUMILEDS 制造商全称:LUMILEDS 功能描述:Lumileds P3 Series TS AlInGaP Chips
HWFR-B310101 制造商:LUMILEDS 制造商全称:LUMILEDS 功能描述:Lumileds P3 Series TS AlInGaP Chips
HWFR-B310102 制造商:LUMILEDS 制造商全称:LUMILEDS 功能描述:Lumileds P3 Series TS AlInGaP Chips
HWFR-B310112 制造商:LUMILEDS 制造商全称:LUMILEDS 功能描述:Lumileds P3 Series TS AlInGaP Chips